8/16/2009

FPGA based SHA1 implementation

[1] "Optimizing SHA-1 Hash Function for High Throughput with a Partial Unrolling Study", Integrated Circuit and System Design, 2005

[2] "Throughput Optimized SHA-1 Architecture Using Unfolding Transformation", Application-specific Systems, Architectures and Processors, 2006. ASAP '06.

3,541 Mbps = 22M/sec
10.4 Gbps = 65M/sec

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