The PowerPC A2 is a massively multicore capable and multithreaded 64-bit Power Architecture processor core designed by IBM using the Power ISA v.2.06 specification. IBM calls products based on it PowerEN (Power Edge of Network) or a "wire-speed processor" and they are designed as hybrids between regular networking processors, doing switching and routing and a typical server processor, that is manipulating and packaging data. It was revealed February 8 2010, at ISSCC 2010.
Versions of processors based on the A2 core range from a 2.3 GHz version with 16 cores doing 65 W to a less powerful, four core version, using 20 W at 1.4 GHz. Each A2 core is capable of four-way multithreading. Each chip has 8 MB of cache as well a multitude of task specific engines besides the general purpose processors, such as XML, cryptography, compression and regular expression accelerators, four 10 Gigabit Ethernet ports and two PCIe lanes. Up to four chips can be linked in a SMP system without any additional support chips.
The chips are said to be extremely complex, and uses 1.43 billion transistors, on a die size of 428 mm² fabricated on a 45 nm process. The processors are in a late development stage and finalized products will be available at a later, unknown date. IBM says it will market the processors to customers.
reference : wikipedia - http://en.wikipedia.org/wiki/PowerPC_A2
A Wire-Speed Power Processor: 2.3GHz 45nm SOI with 16 Cores and 64 Threads ? Presentation, IBM - http://www.power.org/events/2010_ISSCC/Wire_Speed_Presentation_5.5_-_Final4.pdf
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